Senior Lead Engineer - Signal Integrity, Hardware Design (Storage/ Server/ Networking)
Pulau Pinang
Permanent
Full-time
7 days ago
General Overview Functional Area: Engineering Career Stream: Design Engineering Hardware SAP Short Name: SLE-ENG-DHW IC/MGR: Individual Contributor Direct/Indirect Indicator: Indirect Summary Celestica's Hardware Platform Solutions (HPS) offers a range of products focused on networking, storage, and compute solutions for data centers and cloud environments. These solutions include high-performance networking switches, storage controllers, and compute platforms, designed for demanding workloads like AI, machine learning, and high-performance computing. The Signal and Power Integrity (SIPI) Engineer will play a critical role in the providing of these digital PCB designs, simulation and troubleshooting signal and power integrity issues on completed designs. SIPI will also be expected to help with design review of critical PCBs for signal and power integrity concerns. Good communications skills and ability to work with global teams is required. This role works in cross functional teams with other designers, suppliers, customers, manufacturing engineering and project leadership to ensure robust and high quality product development. #LI-LX1 Detailed Description Develop SI and PI design for server/storage/communication products. Major works are to serve as the signal and power integrity analyst and designer provides the support to internal team, suppliers, and customers to deliver the new products. . PCB material selection and stack-up definition. . 3D passive channel modeling and electromagnetic extraction. . Performing signal integrity pre-layout and post-layout analysis. . Performing static timing and signal integrity analysis of parallel interfaces. . Designing and analyzing multi-gigabit serial links. . Performing power integrity analysis on power delivery networks. . Generating and verifying PCB layout rules and managing constraints for PCB layout. . Working directly with ASIC and PCB design teams to evaluate design tradeoffs and optimize performance, risk, cost, and manufacturability. . Cooperating with the R&D team and signal test engineers on debugging, failure analysis, and fixing issues. . Guide juniors SIPI engineers. . Familiar with Server PCB design, PCIe, DDR4/5, 25G/56G Ethernet specification is a plus. Knowledge/Skills/Competencies . Proficiency in Electromagnetic, Transmission-line & S-parameters theories. . Good understanding on Power distribution, DDR and SerDes SIPI designs. . Knowledgeable about Server Architectures SIPI Design Challenges. . Experience with at least one PCB route tools: Cadence Allegro and/or Mentor ICX. . Experience with both time and frequency domains circuit simulation: Keysight ADS, Cadence Sigrity Power DC/SI, Synopsys HSPICE and/or Hyperlynx SIPI. . Experience with at least one 3-D field solver: ANSYS HFSS and/or Cadence Clarity 3D. . Strong written and oral communication in English with customer service skills. Physical Demands Duties of this position are performed in a normal office environment. Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data. Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required. Occasional travel may be required. Typical Experience 6+ years in a similar role or industry. Typical Education Bachelor's degree in Electrical Engineering with emphasis in electromagnetic theory. Master's degree preferred Notes This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.