
Senior Silicon Design Engineer
- Pulau Pinang
- Permanent
- Full-time
- Exposure in Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR
- Extensive Experience in handling different PNR tools - Synopsys Design Compiler, ICC2, ICC, Fusion Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk
- Hands on experience on 16nm, 14nm, 12nm, and sub-10nm projects
- Good knowledge in Physical design, STA, methodology scripts (Tcl), knowledge on Perl, Python
- 6 years of professional experience in the semiconductor industry
- Experience in FinFET & Dual Patterning nodes such as 16/14/12 and sub-10nm nodes
- High-frequency design experience
- Excellent physical design and timing background
- Synopsys Tools Experience Not a Must But Preferred
- Familiarity with all Design areas and tools and solid understanding of design/technology interactions
- Good understanding of computer organization/architecture
- Strong analytical/problem solving skills and pronounced attention to details
- Good teamwork and communications skills are mandatory
- Bachelors or Masters degree in computer engineering/Electrical Engineering.